? semiconductor components industries, llc, 2000 march, 2000 ? rev. 7 1 publication order number: MC74HCT138A/d MC74HCT138A 1-of-8 decoder/ demultiplexer with lsttl compatible inputs high?performance silicon?gate cmos the MC74HCT138A is identical in pinout to the ls138. the hct138a may be used as a level converter for interfacing ttl or nmos outputs to high speed cmos inputs. the hct138a decodes a three?bit address to one?of?eight active?lot outputs. this device features three chip select inputs, two active?low and one active?high to facilitate the demultiplexing, cascading, and chip?selecting functions. the demultiplexing function is accomplished by using the address inputs to select the desired device output; one of the chip selects is used as a data input while the other chip selects are held in their active states. ? output drive capability: 10 lsttl loads ? ttl/nmos compatible input levels ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 4.5 to 5.5 v ? low input current: 1.0 m a ? in compliance with the requirements defined by jedec standard no. 7a ? chip complexity: 122 fets or 30.5 equivalent gates so?16 d suffix case 751b http://onsemi.com tssop?16 dt suffix case 948f 1 16 pdip?16 n suffix case 648 1 16 1 16 marking diagrams 1 16 MC74HCT138An awlyyww 1 16 hct138a awlyww a = assembly location wl = wafer lot yy = year ww = work week hct 138a alyw 1 16 device package shipping ordering information MC74HCT138An pdip?16 2000 / box MC74HCT138Ad soic?16 48 / rail MC74HCT138Adr2 soic?16 2500 / reel MC74HCT138Adt tssop?16 96 / rail MC74HCT138Adtr2 tssop?16 2500 / reel
MC74HCT138A http://onsemi.com 2 logic diagram 7 y6 y5 y4 y3 y2 y1 y0 y7 9 10 11 12 13 14 15 3 2 1 cs1 cs2 a0 a1 a2 active-low outputs address inputs cs3 chip- select inputs 5 4 6 pin 16 = v cc pin 8 = gnd inputs outputs cs1cs2 cs3 a2 a1 a0 y0 y1 y2 y3 y4 y5 y6 y7 x x h xxxhhhhhhhh x h x xxxhhhhhhhh l x x xxxhhhhhhhh h l l lll lhhhhhhh h l l llhhlhhhhhh h l l lhlhhlhhhhh h l l lhhhhhlhhhh h l l hllhhhhlhhh h l l hlhhhhhhlhh h l l hhlhhhhhhlh h l l hhhhhhhhhhl function table h = high level (steady state) l = low level (steady state) x = don't care pin assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 a0 cs2 a2 a1 y7 cs1 cs3 gnd y3 y2 y1 y0 v cc y5 y4 y6 ?????????? ? ???????? ? ?????????? design criteria ???? ? ?? ? ???? value ??? ? ? ? ??? units ?????????? ?????????? internal gate count* ???? ???? 30.5 ??? ??? ea. ?????????? ?????????? internal gate propagation delay ???? ???? 1.5 ??? ??? ns ?????????? ? ???????? ? ?????????? internal gate power dissipation ???? ? ?? ? ???? 5.0 ??? ? ? ? ??? m w ?????????? ?????????? speed power product ???? ???? .0075 ??? ??? pj *equivalent to a two-input nand gate.
MC74HCT138A http://onsemi.com 3 ??????????????????????? ??????????????????????? maximum ratings* ???? ???? symbol ?????????????? ?????????????? parameter ????? ????? value ??? ??? unit ???? ???? v cc ?????????????? ?????????????? dc supply voltage (referenced to gnd) ????? ????? 0.5 to + 7.0 ??? ??? v ???? ???? v in ?????????????? ?????????????? dc input voltage (referenced to gnd) ????? ????? 0.5 to v cc + 0.5 ??? ??? v ???? ???? v out ?????????????? ?????????????? dc output voltage (referenced to gnd) ????? ????? 0.5 to v cc + 0.5 ??? ??? v ???? ???? i in ?????????????? ?????????????? dc input current, per pin ????? ????? 20 ??? ??? ma ???? ???? i out ?????????????? ?????????????? dc output current, per pin ????? ????? 25 ??? ??? ma ???? ???? i cc ?????????????? ?????????????? dc supply current, v cc and gnd pins ????? ????? 50 ??? ??? ma ???? ? ?? ? ???? p d ?????????????? ? ???????????? ? ?????????????? power dissipation in still air plastic dip2 soic package2 tssop package2 ????? ? ??? ? ????? 750 500 450 ??? ? ? ? ??? mw ???? ???? t stg ?????????????? ?????????????? storage temperature ????? ????? 65 to + 150 ??? ??? c ???? ? ?? ? ???? t l ?????????????? ? ???????????? ? ?????????????? lead temperature, 1 mm from case for 10 seconds (plastic dip, tssop or soic package) ????? ? ??? ? ????? 260 ??? ? ? ? ??? c *maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recommended operating conditions. 2derating e plastic dip: 10 mw/ c from 65 to 125 c soic package: 7 mw/ c from 65 to 125 c tssop package: ? 6.1 mw/ c from 65 to 125 c for high frequency or heavy load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). recommended operating conditions ???? ???? symbol ??????????????? ??????????????? parameter ??? ??? min ?? ?? max ??? ??? unit ???? ???? v cc ??????????????? ??????????????? dc supply voltage (referenced to gnd) ??? ??? 4.5 ?? ?? 5.5 ??? ??? v ???? ???? v in , v out ??????????????? ??????????????? dc input voltage, output voltage (referenced to gnd) ??? ??? 0 ?? ?? v cc ??? ??? v ???? ???? t a ??????????????? ??????????????? operating temperature, all package types ??? ??? 55 ?? ?? + 125 ??? ??? c ???? ???? t r , t f ??????????????? ??????????????? input rise and fall time (figure 1) ??? ??? 0 ?? ?? 500 ??? ??? ns dc electrical characteristics (voltages referenced to gnd) ???? ???? ????????? ????????? ????????? ????????? ???? ???? ????????? ????????? guaranteed limit ??? ??? ???? ???? symbol ????????? ????????? parameter ????????? ????????? test conditions ???? ???? v cc v ???? ???? 55 to 25 c ??? ??? 85 c ???? ???? 125 c ??? ??? unit ???? ? ?? ? ???? v ih ????????? ? ??????? ? ????????? minimum high?level input voltage ????????? ? ??????? ? ????????? v out = 0.1 v or v cc 0.1 v |i out | 20 m a ???? ? ?? ? ???? 4.5 5.5 ???? ? ?? ? ???? 2.0 2.0 ??? ? ? ? ??? 2.0 2.0 ???? ? ?? ? ???? 2.0 2.0 ??? ? ? ? ??? v ???? ? ?? ? ???? v il ????????? ? ??????? ? ????????? maximum low?level input voltage ????????? ? ??????? ? ????????? v out = 0.1 v or v cc 0.1 v |i out | 20 m a ???? ? ?? ? ???? 4.5 5.5 ???? ? ?? ? ???? 0.8 0.8 ??? ? ? ? ??? 0.8 0.8 ???? ? ?? ? ???? 0.8 0.8 ??? ? ? ? ??? v ???? ???? v oh ????????? ????????? minimum high-level output voltage ????????? ????????? v in = v ih or v il |i out | 20 m a ???? ???? 4.5 5.5 ???? ???? 4.4 5.4 ??? ??? 4.4 5.4 ???? ???? 4.4 5.4 ??? ??? v ???? ? ?? ? ???? ????????? ? ??????? ? ????????? ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 4.0 m a ???? ? ?? ? ???? 4.5 ???? ? ?? ? ???? 3.98 ??? ? ? ? ??? 3.84 ???? ? ?? ? ???? 3.7 ??? ? ? ? ??? ???? ? ?? ? ???? v ol ????????? ? ??????? ? ????????? maximum low?level output voltage ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 20 m a ???? ? ?? ? ???? 4.5 5.5 ???? ? ?? ? ???? 0.1 0.1 ??? ? ? ? ??? 0.1 0.1 ???? ? ?? ? ???? 0.1 0.1 ??? ? ? ? ??? v ???? ? ?? ? ???? ????????? ? ??????? ? ????????? ????????? ? ??????? ? ????????? v in = v ih or v il |i out | 4.0 ma ???? ? ?? ? ???? 4.5 ???? ? ?? ? ???? 0.26 ??? ? ? ? ??? 0.33 ???? ? ?? ? ???? 0.4 ??? ? ? ? ??? ???? ???? i in ????????? ????????? maximum input leakage current ????????? ????????? v in = v cc or gnd ???? ???? 6.0 ???? ???? 0.1 ??? ??? 1.0 ???? ???? 1.0 ??? ??? m a ???? ? ?? ? ???? i cc ????????? ? ??????? ? ????????? maximum quiescent supply current (per package) ????????? ? ??????? ? ????????? v in = v cc or gnd i out = 0 m a ???? ? ?? ? ???? 5.5 ???? ? ?? ? ???? 4.0 ??? ? ? ? ??? 40 ???? ? ?? ? ???? 160 ??? ? ? ? ??? m a ???? ???? d i cc ????????? ????????? additional quiescent supply current ????????? ????????? v in = 2.4 v, any one input v i =v cc or gnd other in p uts ???? ???? ???? ???? ? 55 c ?????? ?????? 25 c to 125 c ??? ??? ???? ? ?? ? ???? ????????? ? ??????? ? ????????? current ????????? ? ??????? ? ????????? v in = v cc or gnd, other inputs l out = 0 m a ???? ? ?? ? ???? 5.5 ???? ? ?? ? ???? 2.9 ?????? ? ???? ? ?????? 2.4 ??? ? ? ? ??? ma note: information on typical parametric values can be found in chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high?impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
MC74HCT138A http://onsemi.com 4 ac electrical characteristics (v cc = 5.0 v 10%, c l = 50 pf, input t r = t f = 6.0 ns) ????? ????? ?????????????????? ?????????????????? ?????????? ?????????? guaranteed limit ??? ??? ????? ? ??? ? ????? symbol ?????????????????? ? ???????????????? ? ?????????????????? parameter ???? ? ?? ? ???? 55 to 25 c ???? ? ?? ? ???? 85 c ???? ? ?? ? ???? 125 c ??? ? ? ? ??? unit ????? ????? t plh , t phl ?????????????????? ?????????????????? maximum propagation delay, input a to output y (figures 1 and 4) ???? ???? 30 ???? ???? 38 ???? ???? 45 ??? ??? ns ????? ? ??? ? ????? t plh , t phl ?????????????????? ? ???????????????? ? ?????????????????? maximum propagation delay, cs1 to output y (figures 2 and 4) ???? ? ?? ? ???? 27 ???? ? ?? ? ???? 34 ???? ? ?? ? ???? 41 ??? ? ? ? ??? ns ????? ? ??? ? ????? t plh , t phl ?????????????????? ? ???????????????? ? ?????????????????? maximum output transition time, cs2 or cs3 to output y (figures 3 and 4) ???? ? ?? ? ???? 30 ???? ? ?? ? ???? 38 ???? ? ?? ? ???? 45 ??? ? ? ? ??? ns ????? ????? t tlh , t thl ?????????????????? ?????????????????? maximum output transition time, any output (figures 2 and 4) ???? ???? 15 ???? ???? 19 ???? ???? 22 ??? ??? ns ????? ????? t r , t f ?????????????????? ?????????????????? maximum input rise and fall time ???? ???? 500 ???? ???? 500 ???? ???? 500 ??? ??? ns ????? ????? c in ?????????????????? ?????????????????? maximum input capacitance ???? ???? 10 ???? ???? 10 ???? ???? 10 ??? ??? pf note: for propagation delays with loads other than 50 pf, and information on typical parametric values, see chapter 2 of the on semiconductor high-speed cmos data book (dl129/d). typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance (per enabled output)* 51 pf * used to determine the no?load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . for load considerations, see chapter 2 of the on semiconductor high?speed cmos data book (dl129/d). expanded logic diagram a0 a1 a2 cs3 cs2 cs1 1 2 3 4 5 6 15 14 13 12 11 10 9 7 y1 y2 y3 y4 y5 y6 y7 y0
MC74HCT138A http://onsemi.com 5 switching waveforms figure 1. 1.3 v t phl t plh t thl t tlh 3 v gnd figure 2. valid output y 1.3 v 3 v gnd t f t f t phl t plh output y input cs2, cs3 90% 1.3 v 10% t r 3 v gnd t plh t tlh 90% 10% output y input cs1 t phl 2.7 v 1.3 v 0.3 v t thl input a figure 3. t r *includes all probe and jig capacitance figure 4. c l * test point device under test output valid 1.3 v 2.7 v 1.3 v 0.3 v test circuit
MC74HCT138A http://onsemi.com 6 package dimensions pdip?16 n suffix case 648?08 issue r min min max max inches millimeters dim a b c d f g h j k l m s 18.80 6.35 3.69 0.39 1.02 0.21 2.80 7.50 0 0.51 19.55 6.85 4.44 0.53 1.77 0.38 3.30 7.74 10 1.01 0.740 0.250 0.145 0.015 0.040 0.008 0.110 0.295 0 0.020 0.770 0.270 0.175 0.021 0.070 0.015 0.130 0.305 10 0.040 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. 2.54 bsc 1.27 bsc 0.100 bsc 0.050 bsc ?a ? b 18 9 16 f h g d 16 pl s c ?t ? seating plane k j m l ta 0.25 (0.010) m m 0.25 (0.010) t b a m s s min min max max millimeters inches dim a b c d f g j k m p r 9.80 3.80 1.35 0.35 0.40 0.19 0.10 0 5.80 0.25 10.00 4.00 1.75 0.49 1.25 0.25 0.25 7 6.20 0.50 0.386 0.150 0.054 0.014 0.016 0.008 0.004 0 0.229 0.010 0.393 0.157 0.068 0.019 0.049 0.009 0.009 7 0.244 0.019 1.27 bsc 0.050 bsc notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 1 8 9 16 ?a ? ?b ? d 16pl k c g ?t ? seating plane r x 45 m j f p 8 pl 0.25 (0.010) b m m soic?16 d suffix case 751b?05 issue j
MC74HCT138A http://onsemi.com 7 package dimensions tssop?16 dt suffix case 948f?01 issue o ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. section n?n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g detail e f m l 2x l/2 -u- s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ?t? ?v? ?w? 0.25 (0.010) 16x ref k n n
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